In machine vision systems, image quality is an essential requirement. However, in many industrial applications, camera behavior in time can be just as important as the images themselves.
Synchronization, triggering, and parameter control all depend on predictable timing. When control response varies from cycle to cycle, machine tuning becomes more difficult and system behavior becomes harder to predict.
TeliCoreIP, developed by Toshiba Teli, was created to address this challenge by changing how time-critical camera control is handled.
Time-critical camera control completed inside the camera
Conventional USB camera architectures often rely on host-side software execution and CPU resources to process control commands such as register read/write operations and software triggers.
As a result, control timing may be influenced by operating system scheduling, CPU load, and other software activity running on the host PC.
TeliCoreIP takes a different approach.
Time-critical camera control is handled directly by FPGA hardware inside the camera. Control commands such as register read/write operations and software triggers are processed within the camera itself rather than relying on host-side software execution for control processing.
By completing control processing inside the camera hardware, command responses can be achieved in the microsecond range with extremely low timing variation.
Fast response is important. Consistent response is critical.
When evaluating camera control performance, response speed is often the first specification considered.
For machine builders, however, consistency is frequently more important than achieving the lowest possible latency.
A system that responds at nearly the same timing every cycle is generally easier to synchronize and validate than one that occasionally responds faster but exhibits larger timing variation.
Because TeliCoreIP processes control commands directly in FPGA hardware, response behavior remains highly consistent from cycle to cycle.
This deterministic behavior helps simplify synchronization between system components and supports more predictable machine operation.
Hardware-based control independent of host conditions
One of the key characteristics of TeliCoreIP is that control processing is completed inside the camera itself.
Since the control path is implemented in hardware, control timing is not dependent on host operating system behavior or CPU workload in the same way as conventional architectures.
Rather than requiring time-critical operations to pass through multiple software layers, control processing is completed directly within the camera hardware.
This provides machine builders with a predictable and repeatable control platform that can be integrated into automated equipment with greater confidence.
Typical applications:
Deterministic camera control and triggering
Many automated systems require predictable timing relationships between cameras, sensors, motion systems, and controllers.
Because TeliCoreIP provides highly consistent control response behavior, software triggering becomes a practical option in applications where repeatable timing is required.
This can reduce dependence on external I/O boards and dedicated hardware trigger wiring while maintaining predictable camera control.
Multi-condition image capture
Applications using Bulk Trigger and Sequential Shutter often require camera parameters such as exposure time, gain, or region of interest to change between frames.
The deterministic control behavior provided by TeliCoreIP supports reliable frame-by-frame parameter switching, helping these functions operate as intended in synchronized machine systems.
Systems subject to host environment changes
Industrial machines are often expected to remain in operation through multiple PC upgrades and operating system updates.
By completing time-critical control inside the camera hardware, TeliCoreIP helps keep the effects of host-side changes localized around the camera-PC interface, reducing the likelihood of timing-related changes propagating throughout the machine.
Designed around real machine requirements
TeliCoreIP was developed from practical machine-side requirements where predictable timing and repeatable behavior are essential.
By reducing uncertainty in camera control, it helps simplify synchronization, reduce tuning effort, and support stable machine operation throughout the product lifecycle.
For machine builders, the result is not simply faster control processing, but a more deterministic and predictable foundation for machine vision system design.
